
AT88SC12816C
1.2.
Embedded Applications
Through dynamic and symmetric mutual authentication, data encryption, and the use of encrypted checksums, the
AT88SC12816C provides a secure place for storage of sensitive information within a system. With its tamper detection
circuits, this information remains safe even under attack. A 2-wire serial interface running at 1.0 MHz is used for fast
and efficient communications with up to 15 devices that may be individually addressed. The AT88SC12816C is
available in industry standard 8-lead packages with the same familiar pinout as 2-wire serial EEPROMs.
Figure 2.
Block Diagram
V CC
GND
SCL/CLK
SDA/IO
RST
Power
Management
Synchronous
Interface
Asynchronous
ISO Interface
Reset Block
Authentication,
Encryption and
Certification Unit
Data Transfer
Password
Verification
Answer to Reset
Random
Generator
EEPROM
2.
2.1.
2.2.
2.3.
Pin Descriptions
Supply Voltage (V CC )
The V CC input is a 2.7V to 5.5V positive voltage supplied by the host.
Clock (SCL/CLK)
In the asynchronous T = 0 protocol, the SCL/CLK input is used to provide the device with a carrier frequency f . The
nominal length of one bit emitted on I/O is defined as an “elementary time unit” (ETU) and is equal to 372/ f . When the
synchronous protocol is used, the SCL/CLK input is used to positive edge clock data into the device and negative edge
clock data out of the device.
Reset (RST)
The AT88SC12816C provides an ISO 7816-3 compliant asynchronous answer to reset sequence. When the reset
sequence is activated, the device will output the data programmed into the 64-bit answer-to-reset register. An internal
pull-up on the RST input pad allows the device to be used in synchronous mode without bonding RST. The
AT88SC12816C does not support the synchronous answer-to-reset sequence.
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5016KS–SMEM–08/09